| 摘要 |
A chip packaging method, comprising the following steps: S1: providing a carrier (1), forming an adhesive layer (2) on a surface of the carrier (1); S2: adhering at least two semiconductor chips (3) and at least one interconnection structure (4) on a surface of the adhesive layer (2); the interconnection structure (4) comprising a supporting body (5) and a plurality of conductive columns (6) vertically passing through the supporting body (5); S3: forming a plastic sealing layer (10) on the surface of the adhesive layer (2); S4: removing the carrier (1) and the adhesive layer (2); S5: forming a first dielectric layer (11) on the upper surface of the plastic sealing layer (10), and forming a second dielectric layer (12) on the lower surface of the plastic sealing layer (10); S6: forming redistribution lead layers (14) for the semiconductor chips (3) and the interconnection structure (4) on the basis of the first dielectric layer (11) and the second dielectric layer (12), so as to provide interconnection between the chips. By adding the interconnection structure (4) to the packaging process, the redistribution lead layers (14) are formed on both the front side and the rear side of the chips (3), which can maximize the redistribution area, provide interconnection between the chips (3), and effectively save on production costs. |
