发明名称 SEMICONDUCTOR APPARATUS CONFIGURED TO MANAGE AN OPERATION TIMING MARGIN
摘要 A semiconductor apparatus may include a read path configured to transmit data from the semiconductor apparatus in response to a read command and at least one read operation control signal, and an operation control circuit configured to receive a plurality of divided clock signals and the read command to identify the one of the plurality of divided clock signals that is relatively better matched to the received read command to manage timings associated with at least one of the read operation control signals.
申请公布号 US2016240234(A1) 申请公布日期 2016.08.18
申请号 US201615137121 申请日期 2016.04.25
申请人 SK hynix Inc. 发明人 SHIM Seok Bo;BYUN Hee Jin;JUNG Jong Ho
分类号 G11C7/22;G11C7/10 主分类号 G11C7/22
代理机构 代理人
主权项 1. A semiconductor apparatus comprising: an operation control circuit configured to set a first time domain conversion signal as a reference for a read operation when an associated read command is received closer in time to a first divided internal clock signal than a second divided internal clock signal, and set a second time domain conversion signal as a reference for the read operation when an associated read command is received closer in time to the second divided internal clock than the first divided to internal clock; and a read path configured to transmit data from the semiconductor apparatus in response to the read command and at least one read operation control signal.
地址 Icheon-si KR