| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique for more properly performing detailed design of a layout.SOLUTION: Layout design is executed in order from a process P1 through a process P6, in which: the process P1 is for making a floor plan; a process P2 is for dividing a module into smaller submodules in each module obtained by dividing a semiconductor integrated circuit according to the floor plan; a process P3 is for determining positions of module terminals for connection between the submodules; a process P4 is for determining arrangement of a cell in each submodule; a process P5 is for determining wiring connecting the cells; and the process P6 is for creating production data for producing a semiconductor integrated circuit. If there is wiring passing through a border that divides the semiconductor integrated circuit, the priority for assigning the positions of the module terminals arranged on the border is determined on the basis of an interval between two pins connected by the wiring. |
