发明名称 SEMICONDUCTOR DIE
摘要 A semiconductor die includes a substrate and an insulation layer over the substrate. The semiconductor die also includes a plurality of P-metal gate areas within the insulation layer and over a first device region. The semiconductor device further includes a plurality of N-metal gate areas within the insulation layer and over the first device region. The semiconductor device additionally includes a plurality of dummy P-metal gate areas within the insulation layer and over a second device region. The semiconductor device also includes a plurality of dummy N-metal gate areas within the insulation layer and over the second device region. At least one N-metal gate area individually differs in size compared to at least one P-metal gate area. At least one dummy P-metal gate area individually differs in size compared to at least one dummy N-metal gate area.
申请公布号 US2016093610(A1) 申请公布日期 2016.03.31
申请号 US201514955690 申请日期 2015.12.01
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHUANG Harry-Hak-Lay;ZHU Ming
分类号 H01L27/07;H01L29/49;H01L29/423;H01L27/092;H01L49/02 主分类号 H01L27/07
代理机构 代理人
主权项 1. A semiconductor die comprising: a substrate; an insulation layer over the substrate; a plurality of P-metal gate areas within the insulation layer and over a first device region of the substrate; a plurality of N-metal gate areas within the insulation layer and over the first device region; a plurality of dummy P-metal gate areas within the insulation layer and over a second device region of the substrate different from the first device region; and a plurality of dummy N-metal gate areas within the insulation layer and over the second device region, wherein at least one N-metal gate area of the plurality of N-metal gate areas over the first device region individually differs in size compared to at least one P-metal gate area of the plurality of P-metal gate areas over the first device region, andat least one dummy P-metal gate area of the plurality of dummy P-metal gate areas over the second device region individually differs in size compared to at least one dummy N-metal gate area of the plurality of dummy N-metal gate areas over the second device region.
地址 Hsinchu TW