A structure comprising: a die embedded in a coreless substrate, a dielectric material adjacent the die, die pad interconnect structures disposed in a die pad area of the die, and at least one functionalized carrier structure disposed within the coreless substrate, wherein a top surface of the at least one functionalized carrier structure is coplanar with a top surface of the coreless substrate.
申请公布号
EP2999318(A1)
申请公布日期
2016.03.23
申请号
EP20150186947
申请日期
2011.04.15
申请人
INTEL CORPORATION
发明人
NALLA, RAVI, K.;AZIMI, HAMID, R.;GUZEK, JOHN, S.;GONZALEZ, JAVIER SOTO;DELANEY, DREW, W.