| 摘要 |
A method for driving a semiconductor memory device including a transistor with low leakage current between a source and a drain in an off state and capable of storing data for a long time is provided. In a matrix including a plurality of memory cells in each of which a drain of a write transistor, a gate of an element transistor, and one electrode of a capacitor are connected, a gate of the write transistor is connected to a write word line, and the other electrode of the capacitor is connected to a read word line. The amount of charge stored in the capacitor is checked by changing the potential of the read word line, and if the amount of charge has decreased beyond a predetermined amount, the memory cell is refreshed. |
| 主权项 |
1. A method for driving a semiconductor memory device, the semiconductor memory device comprising including a memory cell and a read circuit, the memory cell comprising a first transistor, a second transistor, and a capacitor,
wherein a drain of the first transistor, a gate of the second transistor, and one electrode of the capacitor are connected to each other, wherein a gate of the first transistor, a source of the second transistor, a drain of the second transistor, and the other electrode of the capacitor are connected to a first wiring, a second wiring, a third wiring, and a fourth wiring, respectively, wherein the read circuit comprises a third transistor, and wherein a drain of the third transistor is connected to the third wiring, the steps comprising: writing data in the memory cell through the first transistor;
refreshing the data in the memory cell in a case where a potential of the third wiring is lower than an average value of a potential of a source of the third transistor and a potential of the second wiring when a first potential is applied to the fourth wiring, and the potential of the third wiring is higher than the average value of the potential of the source of the third transistor and the potential of the second wiring when a second potential which is lower than the first potential is applied to the fourth wiring. |
