| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a multi-thread processor capable of selecting a thread schedule according to a state at a high speed when the state of the processor is changed.SOLUTION: A multi-thread processor includes: a plurality of hardware threads each of which generates an independent instruction flow; a thread scheduler 19 that outputs a thread selection signal for designating a hardware thread that is executed in the next execution cycle out of the plurality of hardware threads, according to a first or second schedule; a first selector that selects any one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread; and an arithmetic circuit that executes the instruction output from the first selector. The thread scheduler selects the first schedule when the state of the multi-thread processor is a first state, and selects the second schedule when the state is a second state.</p> |
