| 摘要 |
<P>PROBLEM TO BE SOLVED: To enable a bit line capacity and a precharge electric power to be cut off at a data writing operation in a NAND type flash memory and to efficiently perform the data writing. <P>SOLUTION: A memory plane is divided into a plurality of data areas in a bit line direction, and sub-latches connected to connection lines are arranged for every division part of respective data areas through sub-select transistors TSL and sub-latch select transistors SLSEL which select a connection or disconnection of the connection lines connecting between adjacent respective data areas. After a writing object data area is precharged, the writing object data area is parted with the adjacent data areas by turning off the sub-select transistors TSL. Next, after the sub-latch select transistors SLSEL are turned on and the data latched by the sub-latch are output to the writing object data area, the output data are written into a desired page. <P>COPYRIGHT: (C)2012,JPO&INPIT |
