Dynamic SMT in parallel database systems

摘要

A data management system receives a query. A query optimizer determines an access plan for the query. The access plan has a plurality of stages, where each stage may have a different degree of parallelism for processing threads executing the stage. The query optimizer determines a maximum degree of parallelism for the plurality of stages and reserves processor cores based on the maximum degree of parallelism. The data management system schedules threads on the reserved processor cores for a first stage of the access plan. The data management system changes simultaneous multi-threading (SMT) mode for the processor cores when a second stage of the access plan having a different degree of parallelism is executed.

主权项

1. A method comprising:
determining an access plan for a query, the access plan having a plurality of stages; determining a maximum degree of parallelism for the plurality of stages, wherein the maximum degree of parallelism is the highest degree of parallelism used by any one stage of the access plan; reserving processor cores from a set of processor cores in accordance with the maximum degree of parallelism and a maximum SMT mode, wherein the maximum SMT mode is the maximum number of simultaneous threads executable by any one processor core in the set of processor cores; set an SMT mode for the reserved processor cores based on a first degree of parallelism determined for a first stage of the access plan; scheduling, based on the SMT mode, a plurality of threads for the first stage of the access plan on the reserved processor cores; changing, during processing of the access plan, the SMT mode in accordance with a second degree of parallelism determined for a second stage of the access plan, wherein the SMT mode is decreased in response to determining that the second degree of parallelism is less than the first degree of parallelism determined for the first stage of the access plan or increased in response to determining that the second degree of parallelism is greater than the first degree of parallelism determined for the first stage of the access plan; and scheduling, based on the changed SMT mode, a plurality of threads for the second stage of the access plan on the reserved processor cores.