发明名称 多層回路基板、絶縁シート、および多層回路基板を用いた半導体パッケージ
摘要 <p>Semiconductor chip mounting yield and semiconductor package reliability deteriorate due to warpage of a multilayer circuit board. A multilayer circuit board (1) using an interlayer insulating layer (6) can suppress warpage of the entire multilayer circuit board (1) by making the interlayer insulating layer (6) serve as a buffer material. In the multilayer circuit board (1) using the interlayer insulating layer (6), conductor circuit layers (11) and interlayer insulating layers (6) are alternately arranged. The interlayer insulating layer (6) to be used in the multilayer circuit board (1) includes a first insulating layer and a second insulating layer having an elastic modulus higher than that of the first insulating layer.</p>
申请公布号 JP5771987(B2) 申请公布日期 2015.09.02
申请号 JP20100505349 申请日期 2009.03.25
申请人 发明人
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
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