发明名称 Pre-colored methodology of multiple patterning
摘要 Some embodiments relate to a method for pre-coloring data within an integrated chip layout to avoid overlay errors that result from mask misalignment during multiple patterning lithography. The method may be performed by generating a graphical IC layout file containing an integrated chip layout having a plurality of IC shapes. The IC shapes within the graphical IC layout file are assigned a color during decomposition. The IC shapes are further pre-colored in a manner that deliberately assigns the pre-colored data to a same mask. During mask building data associated with IC shapes that have been pre-colored is automatically sent to a same mask, regardless of the colors that are assigned to the shapes. Therefore, the pre-colored shapes are not assigned to a masked based upon a decomposition, but rather based upon the pre-coloring. By assigning IC shapes to a same mask through pre-coloring, overlay errors can be reduced.
申请公布号 US9075936(B2) 申请公布日期 2015.07.07
申请号 US201314076566 申请日期 2013.11.11
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Chen Yen-Huei;Chan Wei Min;Liao Hung-Jen;Chang Jonathan Tsung-Yung
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Eschweiler & Associates, LLC 代理人 Eschweiler & Associates, LLC
主权项 1. A method for pre-coloring IC layout data for a multiple patterning lithography process, comprising: generating a graphical IC layout file comprising a plurality of IC shapes, wherein the plurality of IC shapes comprise an oxide definition region of a first device coupled to a data line, and an oxide definition region of a second device coupled to a complimentary data line; selectively pre-coloring one or more of the plurality of IC shapes by placing one or more pre-coloring marker shapes on the one or more of the plurality of IC shapes, to indicate that the pre-colored IC shapes are to be formed on a same mask of a multiple mask set used for the multiple patterning lithography process, wherein pre-coloring the first and second oxide definition regions reduces processing variations between on-chip structures corresponding to the first and second oxide definition regions; and operating a decomposition algorithm that assigns two or more different colors to uncolored IC shapes, to indicate that different colored IC shapes are to be formed on different masks of the multiple mask set, without changing the pre-colored colors of the pre-colored IC shapes; wherein a computer is used to generate the graphical IC layout file, to selectively pre-color the one or more of the plurality of IC shapes, or to operate the decomposition algorithm.
地址 Hsin-Chu TW