| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a cache memory control device that can facilitate guaranteeing respective performances of a plurality of requesters sharing a cache memory.SOLUTION: A cache memory control device includes: a cache memory 12b; a second VCPU 32 and a third VCPU 33 sharing the cache memory 12b therebetween and accessing this cache memory 12b; and a memory controller 12a identifying whether the second VCPU 32 or the third VCPU 33 is to access the cache memory 12b, and controlling the identified second VCPU 32 or third VCPU 33 to use a second VCPU area 12b1 or a third VCPU area 12b2 corresponding to the identified second VCPU 32 or third VCPU 33.</p> |
