ARITHMETIC UNIT INCLUDING ASIP AND METHOD OF DESIGNING SAME

摘要

In order to achieve tasks, according to an embodiment of the present invention, an arithmetic unit including one or more ASIPs includes two or more processors, and an execution unit that is connected to the two or more processors and executes instructions received from the processors. According to an embodiment of the present invention, it is possible to provide a low-power, high-integration, high-performance arithmetic unit through resource sharing using the arithmetic unit including the one or more ASIPs, and it is possible to provide a method of designing an arithmetic unit that may be applied to a specific application.

主权项

1. An arithmetic device having at least two processors, the device comprising:
execution units which are connected to the at least two processors and configured to execute instructions received from the at least two processors.