发明名称 Method and system for patterning a substrate
摘要 A method of patterning a substrate comprises providing an array of resist features defined by a first pitch and a first gap width between adjacent resist features. Particles are introduced into the array of resist features, wherein the array of resist features becomes hardened. The introduction of particles may cause a reduction in critical dimension of the resist features. Sidewalls are provided on side portions of hardened resist features. Subsequent to the formation of the sidewalls, the hardened resist features are removed, leaving an array of isolated sidewalls disposed on the substrate. The sidewall array provides a mask for double patterning of features in the substrate layers disposed below the sidewalls, wherein an array of features formed in the substrate has a second pitch equal to half that of the first pitch.
申请公布号 US8912097(B2) 申请公布日期 2014.12.16
申请号 US201012859606 申请日期 2010.08.19
申请人 Varian Semiconductor Equipment Associates, Inc. 发明人 Martin Patrick M.;Carlson Steven;Oh Choong-Young;Park Jung-Wook
分类号 H01L21/302 主分类号 H01L21/302
代理机构 代理人
主权项 1. A method of patterning a substrate, comprising: providing an array of resist features on a surface of said substrate, said array defined by a first pitch and a first gap width between adjacent resist features, wherein each resist feature comprises a top portion and side portions; introducing particles into said array of resist features, wherein said array of resist features becomes hardened; depositing a spacer material on said surface, said top portions and said side portions, after said introducing; removing portions of said spacer material, wherein said top portions and portions of said surface are exposed and wherein said spacer material remains disposed along said side portions, forming sidewalls; and removing said hardened array of resist features wherein an array of isolated sidewalls that are disposed on said surface of said substrate is formed.
地址 Gloucester MA US
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