发明名称 DATA PROCESSING SYSTEM AND METHOD OF CONTROLLING ACCESS TO A SHARED MEMORY UNIT
摘要 A data processing system comprising at least a memory unit, a first client connected to the memory unit, and a second client connected to the memory unit is proposed. The first client may comprise a first memory access unit and an information unit. The first memory access unit may read data from or write data to the memory unit at a first data rate. The information unit may update internal data correlating with a minimum required value of the first data rate. The second client may comprise a second memory access unit and a data rate limiting unit. The second memory access unit may read data from or write data to the memory unit at a second data rate. The data rate limiting unit may limit the second data rate in dependence on the internal data. The first memory access unit may, for example, read data packets sequentially from the memory unit, and the information unit may update the internal data at least per data packet. A method of controlling access to a shared memory unit is also proposed.
申请公布号 EP2783286(A1) 申请公布日期 2014.10.01
申请号 EP20110810644 申请日期 2011.11.24
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 STAUDENMAIER, MICHAEL;AMON, YOSSI;AUBINEAU, VINCENT
分类号 G06F9/50;G06F12/00 主分类号 G06F9/50
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