发明名称 JUNCTION FET SEMICONDUCTOR DEVICE WITH DUMMY MASK STRUCTURES FOR IMPROVED DIMENSION CONTROL AND METHOD FOR FORMING THE SAME
摘要 A method for simultaneously forming JFET devices and MOSFET devices on a substrate includes using gate structures which serve as active gate structures in the MOSFET region, as dummy gate structures in the JFET portion of the device. The dummy gate electrodes are used as masks and determine the spacing between gate regions and source/drain regions, the width of the gate regions, and the spacing between adjacent gate regions according to some embodiments. The transistor channel is therefore accurately dimensioned.
申请公布号 US2014264476(A1) 申请公布日期 2014.09.18
申请号 US201313861523 申请日期 2013.04.12
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 TSENG Hua-Chou;LIN Han-Chung
分类号 H01L29/808;H01L29/66 主分类号 H01L29/808
代理机构 代理人
主权项 1. A semiconductor device comprising: a substrate; a JFET transistor comprising a gate region of one polarity disposed in said substrate and source and drain regions of opposite polarity also disposed in said substrate and spaced apart from said gate region, wherein said source region is spaced apart from said gate region in said substrate by a source-gate link region having a length “a” and said drain region is spaced apart from said gate region in said substrate by a drain-gate link region having a length “b;” a dummy gate structure disposed over a surface of said substrate and having a maximum width equal to said length “a;” and a further dummy gate structure disposed over said surface and having a maximum width equal to said length “b”.
地址 Hsin-Chu TW