发明名称 Method, Apparatus, System For Representing, Specifying And Using Deadlines
摘要 In an embodiment, a shared memory fabric is configured to receive memory requests from multiple agents, where at least some of the requests have an associated order identifier and a deadline value to indicate a maximum latency prior to completion of the memory request. Responsive to the requests, the fabric is to arbitrate between the requests based at least in part on the deadline values. Other embodiments are described and claimed.
申请公布号 US2014240326(A1) 申请公布日期 2014.08.28
申请号 US201313780117 申请日期 2013.02.28
申请人 Cutter Daniel F.;Fanning Blaise;Nagarajan Ramadass;Iyer Ravishankar;Le Quang T.;Kolagotla Ravi;Schoinas Ioannis T.;Niell Jose S. 发明人 Cutter Daniel F.;Fanning Blaise;Nagarajan Ramadass;Iyer Ravishankar;Le Quang T.;Kolagotla Ravi;Schoinas Ioannis T.;Niell Jose S.
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
主权项 1. An apparatus comprising: a plurality of intellectual property (IP) blocks of a semiconductor device coupled to a fabric, wherein at least some of the plurality of IP blocks are associated with a deadline logic to generate a deadline value to indicate a latency to complete a memory request and to communicate the memory request to the fabric with the deadline value.
地址 Maynard MA US