REDUNDANCY CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME

摘要

A redundancy circuit includes a redundancy decoder, a fuse array, and a decoder. The redundancy decoder activates a spare column selection line connected to a redundancy block, which replaces a bad cell selected by the address of the bad cell by decoding a redundancy enable signal, in response to the redundancy enable signal indicating agreement of the address of the bad cell with an input address. The fuse array includes a plurality of fuse devices to determine a plurality of segments based on the availability of the segments constructing the redundancy block. The decoder connects a plurality of coding signals provided from the fuse array to at least one spare column line among the segments by decoding the coding signals.