NONPLANAR III-N TRANSISTORS WITH COMPOSITIONALLY GRADED SEMICONDUCTOR CHANNELS

摘要

A III-N semiconductor channel is compositionally graded between a transition layer and a III-N polarization layer. In embodiments, a gate stack is deposited over sidewalls of a fin including the graded III-N semiconductor channel allowing for formation of a transport channel in the III-N semiconductor channel adjacent to at least both sidewall surfaces in response to a gate bias voltage. In embodiments, a gate stack is deposited completely around a nanowire including a III-N semiconductor channel compositionally graded to enable formation of a transport channel in the III-N semiconductor channel adjacent to both the polarization layer and the transition layer in response to a gate bias voltage.

主权项

1. A non-planar III-N transistor disposed on a substrate, the transistor comprising:
two wide band gap material layers on opposite {0001} surfaces of a III-N semiconductor channel that has a compositional grading along the c-axis between the two wide band gap III-N layers; a gate stack comprising a gate dielectric and gate electrode, the gate stack disposed over opposing surfaces of the semiconductor channel that span a distance between the two wide band gap material layers; and a pair of source/drain regions embedded in or coupled to the non-planar III-N semiconductor body at opposite sides of the gate stack.