发明名称 Cache Sector Dirty Bits
摘要 A cache subsystem apparatus and method of operating therefor is disclosed. In one embodiment, a cache subsystem includes a cache memory divided into a plurality of sectors each having a corresponding plurality of cache lines. Each of the plurality of sectors is associated with a sector dirty bit that, when set, indicates at least one of its corresponding plurality of cache lines is storing modified data of any other location in a memory hierarchy including the cache memory. The cache subsystem further includes a cache controller configured to, responsive to initiation of a power down procedure, determine only in sectors having a corresponding sector dirty bit set which of the corresponding plurality of cache lines is storing modified data.
申请公布号 US2013346683(A1) 申请公布日期 2013.12.26
申请号 US201213530907 申请日期 2012.06.22
申请人 WALKER WILLIAM L. 发明人 WALKER WILLIAM L.
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
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