Stacked memory device having a scalable bandwidth interface

摘要

A memory device having a scalable bandwidth I/O data bus includes a semiconductor die having a substrate with a first and a second surface. The substrate includes contact pads arranged in rows across the first surface and across the second surface. The contact pads on one surface may be physically arranged in vertical alignment with a corresponding contact pad on the other surface and may be electrically coupled to the corresponding contact pad using a via. The substrate also includes a metallization layer formed on the second surface. The metallization layer includes external data contact pads each arranged in vertical alignment with a respective contact pad on the second surface. Each row of contact pads may be grouped, and the external contact pads within a group are electrically coupled to an adjacent contact pad on the second surface by effectively logically shifting them to the right one contact pad.