VIRTUAL FAILURE ADDRESS GENERATION SYSTEM, REDUNDANCY ANALYSIS SIMULATION SYSTEM, AND METHOD THEREOF

摘要

PROBLEM TO BE SOLVED: To provide a virtual failure address generation system.SOLUTION: The virtual failure address generation system comprises: a storage unit which stores an occurrence probability distribution of fault patterns according to failure levels calculated from a first failure bit map representing failures included in a first wafer as a plurality of pixels having mutually different failure levels; and a virtual failure address generation module which receives a second failure bit map representing failures included in a second wafer as a plurality of pixels having mutually different failure levels, and generates virtual failure addresses for the failures included in the second wafer by using the probability distribution stored in the storage unit.