发明名称 |
MULTIPLE-INPUT AND MULTIPLE-OUTPUT CARRIER AGGREGATION RECEIVER REUSE ARCHITECTURE |
摘要 |
<p>A wireless communication device configured for receiving a wireless multiple-input and multiple-output signal. The wireless communication device includes a first multiple-input and multiple-output carrier aggregation receiver reuse architecture. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a first antenna, a second antenna and a transceiver chip. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a first carrier aggregation receiver path. The wireless communication device also includes a second multiple-input and multiple-output carrier aggregation receiver reuse architecture. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a third antenna, a fourth antenna and a receiver chip. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a second carrier aggregation receiver path.</p> |
申请公布号 |
WO2013131047(A1) |
申请公布日期 |
2013.09.06 |
申请号 |
WO2013US28737 |
申请日期 |
2013.03.01 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
GUDEM, PRASAD, SRINIVASA SIVA;HE, XIAOYIN;KADOUS, TAMER, ADEL;CHANG, LI-CHUNG |
分类号 |
H04B1/00 |
主分类号 |
H04B1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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