发明名称 Optimal programming levels for LDPC
摘要 The subject disclosure describes a method for reducing a sector error rate in a flash memory device, the method comprising, identifying a first program verify level having a first value, selecting an adjustment value for the first program verify level and programming the adjustment value to the first program verify level to replace the first value and to shift a first programming distribution associated with the first program verify level, wherein the shift in the first programming distribution is associated with a decrease in a sector error rate, wherein the shift in the first programming distribution is associated with an increase in a bit error rate. A flash storage device and computer-readable media are also provided.
申请公布号 US8484519(B2) 申请公布日期 2013.07.09
申请号 US201213553707 申请日期 2012.07.19
申请人 WEATHERS ANTHONY D.;BARNDT RICHARD D.;HU XINDE;STEC, INC. 发明人 WEATHERS ANTHONY D.;BARNDT RICHARD D.;HU XINDE
分类号 G06F11/00;G11C29/00;H03M13/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址