发明名称 POWER MANAGEMENT IN SEMICONDUCTOR MEMORY SYSTEM
摘要 A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coupled to a memory interface device, which can be coupled to a memory module. The memory module can comprise a plurality of memory devices. The chip select, command and address information can be received at the memory interface using a command-and-address-latency (CAL) mode. Control logic can be used to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device.
申请公布号 US2013028039(A1) 申请公布日期 2013.01.31
申请号 US201213558332 申请日期 2012.07.25
申请人 INPHI CORPORATION;WANG DAVID T. 发明人 WANG DAVID T.
分类号 G11C5/14 主分类号 G11C5/14
代理机构 代理人
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