发明名称 |
DISPLAY DEVICE AND ELECTRONIC APPARATUS |
摘要 |
A sampling transistor in embodiments of the present invention is kept at the on-state with a time width shorter than one horizontal cycle, during the period from the rising of a control pulse supplied from a scanner to the falling of the control pulse, and samples a video signal Vsig from a signal line SL to write the video signal Vsig to a hold capacitor. A sampling transistor T1 has a double gate structure in which a pair of transistor elements are connected in common. This suppresses change in the threshold voltage of the sampling transistor. |
申请公布号 |
US2012182281(A1) |
申请公布日期 |
2012.07.19 |
申请号 |
US201213428513 |
申请日期 |
2012.03.23 |
申请人 |
YAMAMOTO TETSURO;YAMASHITA JUNICHI;JINTA SEIICHIRO;SUGIMOTO HIDEKI;UCHINO KATSUHIDE;SONY CORPORATION |
发明人 |
YAMAMOTO TETSURO;YAMASHITA JUNICHI;JINTA SEIICHIRO;SUGIMOTO HIDEKI;UCHINO KATSUHIDE |
分类号 |
G09G5/00 |
主分类号 |
G09G5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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