发明名称 MEMORY CONTROLLER, FLASH MEMORY SYSTEM WITH MEMORY CONTROLLER, AND CONTROL METHOD OF FLASH MEMORY
摘要 <P>PROBLEM TO BE SOLVED: To suppress the efficiency reduction of access processing based on inter-block transfer by reducing the frequency of inter-block transfer. <P>SOLUTION: Data given from a host system is written in a physical page within a physical block being managed as a write destination block. The number of physical pages storing invalid data therein within the physical block is counted and a physical block having the greatest number of pages is specified. Valid data being stored in that physical block is transferred to a physical page within a physical block being managed as a transfer destination block. Different physical blocks are selected for the physical block being managed as the write destination block and the physical block being managed as the transfer destination block. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012068765(A) 申请公布日期 2012.04.05
申请号 JP20100211428 申请日期 2010.09.21
申请人 TDK CORP 发明人 KANAZAWA SO
分类号 G06F12/00;G06F12/02 主分类号 G06F12/00
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