MEMORY CONTROL DEVICE AND METHOD FOR CONTROLLING SAME

摘要

A priority control register 104 dynamically controls the internal transition state based on the issuability state of a memory request obtained in the memory request issuability signal generation unit 106 and retaining state of the memory request in the REQ_BUF 102 obtained by each of determination circuits 105 #2 through #5. Thus, the jump control of the priorities corresponding to the access regulation of the DRAM module 109 can be realized.