| 摘要 |
The invention relates to a method for operating an inverter circuit, wherein the inverter circuit comprises at least two phase modules (11), wherein each phase module (11) comprises a first and a second partial inverter system (1), the partial inverter systems (2) are serially interconnected for each phase module (11), the connection point of the two partial inverter systems (1, 2) forms an output connection (A), each partial inverter system (1, 2) comprises an inductance (L1, L2) and at least one two-pole switching cell (3) serially connected relative thereto, and each switching cell (3) comprises two actuatable bidirectional power semiconductor switches that are connected in series and that have controlled unidirectional current flow direction and a capacitive energy store connected in parallel to the serial connection of the power semiconductor switch. According to said method, the power semiconductor switch of the switching cells (3) of the first partial inverter system (1) is actuated by means of an actuating signal (S1) and the power semiconductor switch of the switching cells (3) of the second partial inverter system (2) is actuated by means of a further actuating signal (S2). In order to be able to dimension the capacitive energy store of the inverter circuit independent of the desired current at the output connection of the inverter circuit, that is, of the frequency thereof, the actuating signal (S1) for each phase module (11) is formed of a voltage signal (VL) by means of the inductivities (L1, L2) and a circuit function (a1) for the power semiconductor switch of the switching cells (3) of the first partial inverter system (1), the further actuating signal (S2) is formed of a voltage signal (VL) by means of the inductivities (L1, L2) and a circuit function (a2) for the power semiconductor switch of the switching cells (3) of the second partial inverter system (2), and the circuit functions (a1, a2) are formed by means of a voltage signal (VA) with respect to the voltage (Vu) at the output connection (A) and a selectable reference signal (Vref), wherein the voltage signals (VA) are selected to be in phase with respect to the voltage (Vu) at the output connections (A) of the phase modules (11). |
