发明名称 |
Display panel drive-control device and display panel drive-control method |
摘要 |
A first latch circuit temporarily memorizes a display pixel data by one line. A second latch circuit temporarily memorizes the display pixel data as a preceding display pixel data that precedes the display pixel data by one line. The load judging circuit judges a transition state of the display pixel data based on the display pixel data and the preceding display pixel data and predicts a drive load capacity CL based on a result of the judgment. A drivability adjusting circuit adjusts a signal level of the display pixel data based on a result of the prediction of the drive load capacity CL and adjusts drivability of an output.
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申请公布号 |
US7940231(B2) |
申请公布日期 |
2011.05.10 |
申请号 |
US20070727469 |
申请日期 |
2007.03.27 |
申请人 |
PANASONIC CORPORATION |
发明人 |
MORIYAMA SEIICHI;KAGEYAMA HIROYUKI;SEIKE MAMORU;SUENAGA JYUNICHI |
分类号 |
G09G3/28;G09G3/36 |
主分类号 |
G09G3/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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