发明名称 DIRECT MEMORY ACCESS CONTROL DEVICE
摘要 PURPOSE:To perform direct memory access transfer to a memory area across two blocks continuously in an ordinary manner by holding the address information corresponding to the mutually different address areas to be continuously accessed by the memory into each channel. CONSTITUTION:Beforehand the 1st channel 1a and the 1st address expansion register 2a as well as the 2nd channel 1b and 2nd address expanding register 2b are so programmed that the lower areas and upper areas than the boundaries of the respective blocks are transferred respectively into these. In this state, data transfer requests arise in the channels 1a and 1b from an input-output device 4. At this time, the degree of priority of the channel 1a is higher than that of the channel 1b, and therefore the transfer of the direct memory access DMA by the control of the channel 1a takes place earlier. Upon completion of all the transfer of the channel 1a, the transfer of the channel 1b is started. Thereby, the DMA transfer to the memory areas across the two blocks is continuously accomplished in exactly the same manner as that in ordinary DMA transfer.
申请公布号 JPS56153426(A) 申请公布日期 1981.11.27
申请号 JP19800056465 申请日期 1980.04.28
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAMURA KAZUO
分类号 G06F13/28 主分类号 G06F13/28
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