发明名称 DIGITAL QUADRATURE MODULATOR
摘要 <P>PROBLEM TO BE SOLVED: To make a circuit small in scale, and to achieve simplified configuration. <P>SOLUTION: A serial-parallel converter 12 divides signals of transmission code rows into an in-phase-side signal and a quadrature-side signal, and mapping circuits 13-1 and 13-2 perform mapping and oversampling circuits 14-1 and 14-2 insert zeros into the signal after mapping for oversampling. A delay circuit 2 delays the quadrature-side signal after oversampling by one clock. An adder 3 adds the in-phase-side signal after oversampling with the quadrature-side signal with one clock delayed, and a band pass filter 4 subjects the added signal to filter processing having raised cosine roll-off characteristics in which a frequency band with a predetermined width from the center of modulated frequency on a frequency axis is cut-off frequency. The delay circuit 2, the adder 3 and the band pass filter 4 are used to generate an optional modulated signal instead of the conventional low-pass filter, oscillator, phase shifter, and multiplier. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010268233(A) 申请公布日期 2010.11.25
申请号 JP20090117956 申请日期 2009.05.14
申请人 NIPPON HOSO KYOKAI <NHK>;NHK ENGINEERING SERVICES INC 发明人 ISO NAOHIKO
分类号 H04L27/36;H04B1/04;H04B7/15 主分类号 H04L27/36
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