发明名称 Clocking technique of multi-modulus divider for generating constant minimum on-time
摘要 An apparatus and method for converting an input frequency signal to an output frequency signal is able to detect and lock onto the phase and frequency of the input signal by using a fractional-N divider phase-locked loop configuration, in which a frequency division signal is generated having an on time that is independent of the division ratio of a fractional-N divider.
申请公布号 US7764094(B1) 申请公布日期 2010.07.27
申请号 US20080058377 申请日期 2008.03.28
申请人 MARVELL INTERNATIONAL LTD. 发明人 ARORA HIMANSHU
分类号 H03L7/06 主分类号 H03L7/06
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