发明名称 NAF CONVERSION DEVICE
摘要 <p>Provided is a scalable w-NAF conversion device with a small circuit size. The NAF device converts the binary expression of an integer into a redundant binary express expressed as a w-NAF. The device is equipped with an acceptance means which accepts the aforementioned binary expression of the integer one bit at a time starting with the least significant bit thereof; a memory means which stores a state value expressed with one bit; a shift register which stores a state value expressed with w-1 bits; and an updating means which references the one-bit value accepted by the aforementioned acceptance means, the state value in the aforementioned memory means, and the state value in the aforementioned w-1-bit shift register, determines the state of the aforementioned memory means and the state of the aforementioned w-1-bit shift register at the following time, and determines the w-bit parallel output at the present time.</p>
申请公布号 WO2010082629(A1) 申请公布日期 2010.07.22
申请号 WO2010JP50420 申请日期 2010.01.15
申请人 KABUSHIKI KAISHA TOSHIBA;SHIMIZU, HIDEO 发明人 SHIMIZU, HIDEO
分类号 H03M7/04;G06F7/49 主分类号 H03M7/04
代理机构 代理人
主权项
地址