发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a normally-off type junction FET reducing a channel resistance without decreasing a withstand voltage. SOLUTION: An impurity concentration of a channel region (a second epitaxial layer 3) of the junction FET formed with the use of a substrate 1 comprising a silicon carbide is higher than that of a first epitaxial layer 2 to be a drift layer. The channel region is formed by a region 7A with a constant channel width and a region 7B with a channel width becoming broader toward the drain (the substrate 1) side under the region 7A. The boundary between the first epitaxial layer 2 and the channel region is positioned at the region 7B with the channel width becoming broader toward the drain (the substrate 1) side. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010040686(A) 申请公布日期 2010.02.18
申请号 JP20080200397 申请日期 2008.08.04
申请人 RENESAS TECHNOLOGY CORP 发明人 SHIMIZU HARUKA;YOKOYAMA NATSUKI
分类号 H01L21/337;H01L29/80;H01L29/808 主分类号 H01L21/337
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