发明名称 Systems and methods for improved scan testing fault coverage
摘要 Systems and methods for improved fault coverage of logic built-in-self-tests (LBISTs) in integrated circuits (ICs) which ensure testing of specific logic by forcing specific values into scan latches that contain otherwise pseudorandom test bit patterns. In one embodiment, an LBIST system comprises a plurality of scan latches and forcing logic coupled to a first set of the scan latches which provide inputs to selected target logic. The forcing logic is configured to overwrite values stored in the first set of scan latches with desired values. In one embodiment, the forcing logic includes a bypass path that enables shifting of unaltered bit patterns around the first set of scan latches. Bits in the bypass path may be inverted when the bypass path is not being used in order to help detect errors in the operation of the bypass path.
申请公布号 US7607059(B2) 申请公布日期 2009.10.20
申请号 US20060533008 申请日期 2006.09.19
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OSANAI TAKEKI
分类号 G01R31/28 主分类号 G01R31/28
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