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发明名称
A method of circuit verification in digital design
摘要
申请公布号
EP1221663(B1)
申请公布日期
2009.06.24
申请号
EP20010108653
申请日期
2001.04.05
申请人
ONESPIN SOLUTIONS GMBH
发明人
JOHANNSEN, PEER
分类号
G06F17/50
主分类号
G06F17/50
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