FAILURE TEST METHOD FOR SPLIT GATE FLASH MEMORY

摘要

A failure test method of word line-bit line short circuit in a split gate flash memory is provided. A well leakage-current test is performed to identify a sector with a failed memory cell. After being programmed, memory cells in the sector undergo a first read operation to generate a first bit map of the sector. After being erased, these memory cells in the sector undergo a second read operation to generate a second bit map of the sector. The first bit map and the second bit map are overlaid to identify the actual address of the failed memory cell.