发明名称 Digital-to-analog converter circuit including adder drive circuit and display
摘要 A digital-to-analog conversion circuit includes a gradation voltage generation circuit, a most-significant-bits decoder circuit, a least-significant-bits decoder circuit and a calculation circuit. The gradation voltage generation circuit generates multiple main voltages corresponding to most significant bits of the inputted data, and multiple sub voltages corresponding to least significant bits of the inputted data. The most-significant-bits decoder circuit selects one of the main voltages in accordance with the most significant bits, and the least-significant-bits decoder circuit selects one of the sub voltages in accordance with the least significant bits. The calculator circuit performs calculation processing by use of a first main voltage selected by the most-significant-bits decoder circuit, a first sub voltage selected by the least-significant-bits decoder circuit, and a reference voltage.
申请公布号 US2008266231(A1) 申请公布日期 2008.10.30
申请号 US20080081831 申请日期 2008.04.22
申请人 UMEDA KENGO 发明人 UMEDA KENGO
分类号 G09G3/36 主分类号 G09G3/36
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