发明名称 |
Efficient integrated circuit layout scheme to implement a scalable switching network used in interconnection fabric |
摘要 |
Efficient layout schemes to implement switching networks of an interconnection fabric in an integrated circuit to connect two sets of conductors through rows of switches with prescribed number of tracks over the switching area are described. The layout schemes can be used repeatedly for multiple-stage switching network and/or hierarchically arranged switching networks.
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申请公布号 |
US7423453(B1) |
申请公布日期 |
2008.09.09 |
申请号 |
US20060336014 |
申请日期 |
2006.01.20 |
申请人 |
ADVANTAGE LOGIC, INC. |
发明人 |
TING BENJAMIN S.;PANI PETER M. |
分类号 |
H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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