发明名称 Synchronous Memory Data Strobe Timing Compensation
摘要 A nominal, an early and a late compensated memory strobe signal are generated from data strobe signal from a memory, such as a double data rate memory. One of the compensated data strobe signals is then used to latch the data from the memory. The signal may be selected based on the alignment between the data and the strobe signal. The compensated signals may be generated by creating divide by two strobe signals from the original strobe signal, which are staggered by half a strobe cycle. The data is stored in a buffer such that each of four internal interconnects holds every fourth unit of data sent. The appropriate divide by two strobe signal is then selected to latch the data.
申请公布号 GB2445066(A) 申请公布日期 2008.06.25
申请号 GB20070023229 申请日期 2007.11.27
申请人 INTEL CORPORATION 发明人 CHEE HAK TEH;SURYAPRASAD KAREENAHALLI;ZOHAR BOGIN
分类号 G06F13/42;G11C7/10 主分类号 G06F13/42
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