发明名称 STACK TYPE WAFER LEVEL PACKAGE AND METHOD OF MANUFACTURING THE SAME, AND WAFER LEVEL STACK PACKAGE AND METHOD OF MANUFACTURING THE SAME
摘要 A stacked-type wafer level package includes a semiconductor chip through which a hole is formed, a conductive pattern and a conductive bump. The conductive pattern includes a conductive trace formed on an upper face of the semiconductor chip and electrically connected to the semiconductor chip, and a conductive pad extending from the conductive trace through the hole. The conductive pad is not protruded from a lower face of the semiconductor chip. The conductive bump is positioned on the conductive trace over the conductive pad.
申请公布号 KR100828027(B1) 申请公布日期 2008.05.08
申请号 KR20060058780 申请日期 2006.06.28
申请人 发明人
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
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