SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME

摘要

A semiconductor memory device and a method for operating the same are provided to correct mismatch of input timing of a clock signal and an inverted clock signal inputted to the semiconductor memory device. A first clock input part(110) outputs a first clock signal by referring to cross point of a system clock signal and an inverted system clock signal. A second clock input part(120) outputs a second clock signal by referring to cross point of the system clock signal and a reference signal. A third clock input part(130) outputs a third clock signal by referring to cross point of the inverted clock signal and the reference signal. A delay part(140) outputs a fourth clock signal by delaying the first clock signal by a delay value corresponding to a control signal. A clock delay adjustment part(150) outputs the control signal in correspondence to phase difference between the fourth clock signal and the second clock signal or phase difference between the fourth clock signal and the third clock signal.