| 摘要 |
<P>PROBLEM TO BE SOLVED: To prevent the leakage of charges held to a storage circuit using a gain cell while ensuring the operation at a high speed of a logic circuit in a semiconductor integrated circuit mixedly loading the logic circuit and the storage circuit. <P>SOLUTION: The semiconductor integrated circuit 1 has a semiconductor substrate 2; and a logic circuit 3 forming the logic circuit from both a first transistor Tp being formed to a semiconductor layer formed to the substrate, and having a first conductive channel conductivity type and a second transistor Tn having a second conductive channel conductivity type. The semiconductor integrated circuit 1 further has a storage circuit 4 containing a third transistor Tmn formed to the semiconductor substrate 2 or the semiconductor layer, and forming the storage circuit. In the semiconductor integrated circuit 1, a compressive stress film 10p is formed by a joining with the first transistor Tp, and a tensile stress film 10n is formed by the joining with the second transistor Tn. In the semiconductor integrated circuit 1, both the compressive stress film 10p and the tensile stress film 10n are not formed in at least a part of the storage circuit 3 forming the third transistor Tmn. <P>COPYRIGHT: (C)2008,JPO&INPIT |
