发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device having a MOS transistor structure in which an n-channel gate electrode and a p-channel gate electrode are mixed in a piece of gate electrode, wherein its np boundary can suppress influences given to a MOS transistor. SOLUTION: A p-channel metal gate electrode 22P of a PMOS transistor is composed of a first silicide phase, an n-channel metal gate electrode 22N of an NMOS transistor is composed of a second silicide phase, and a metal gate electrode 22B on an element isolation insulating film 11 positioned at a boundary between an n-well 12N and a p-well 12P is composed of a third silicide phase. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008021903(A) 申请公布日期 2008.01.31
申请号 JP20060193867 申请日期 2006.07.14
申请人 RENESAS TECHNOLOGY CORP 发明人 KOSUGI TAKESHI
分类号 H01L21/8238;H01L21/28;H01L27/092;H01L29/423;H01L29/49;H01L29/78 主分类号 H01L21/8238
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