发明名称 Stacked chip packaging structure
摘要 A stacked chip packaging structure ( 10 ) includes a substrate ( 20 ), a first chip ( 40 ), a second chip ( 70 ), and a cover ( 80 ). The first chip is mounted on the substrate and is electrically connected with the substrate via a first plurality of wires ( 50 a). The second chip is mounted above the first chip and above the wires connected with the first chip and is electrically connected with the substrate via a second plurality of wires ( 50 b). The cover is mounted above the second chip and the wires connected with the second chip. The mounting of the second chip and the cover in such a manner is facilitated through the use of an adhesive/glue ( 60 a, 60 b) that is able to function both as an adherent and as a spacer.
申请公布号 US2007152345(A1) 申请公布日期 2007.07.05
申请号 US20060592848 申请日期 2006.11.03
申请人 ALTUS TECHNOLOGY INC. 发明人 WU YING-CHENG;SU YING-TANG
分类号 H01L23/52 主分类号 H01L23/52
代理机构 代理人
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