Avoiding live-lock in a processor that supports speculative execution

摘要

One embodiment of the present invention provides a system which avoids a live-lock state in a processor that supports speculative-execution. The system starts by issuing instructions for execution in program order during execution of a program in a normal-execution mode. Upon encountering a launch condition during the execution of an instruction (a "launch instruction") which causes the processor to enter a speculative-execution mode, the system checks status indicators associated with a forward progress buffer. If the status indicators indicate that the forward progress buffer contains data for the launch instruction, the system resumes normal-execution mode. Upon resumption of normal-execution mode, the system retrieves the data from a data field contained in the forward progress buffer and executes the launch instruction using the retrieved data as input data for the launch instruction. The system next deasserts the status indicators. The system then continues to issue instructions for execution in program order in normal-execution mode. Using the forward progress buffer in this way prevents the processor from entering a potential live-lock state.