| 摘要 |
A driver circuit in a phase interpolator is provided. In some embodiments, it comprises an input to receive an input clock signal, an output; and at least one pull-up and pull-down device coupled between the input and output to provide at the output the input clock signal driven at a desired level. The at least one pull-up and pull-down devices comprise a plurality of selectably engageable devices to drive the input clock signal at the desired level. Other embodiments are described and/or claimed herein.
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