TIMING COMPARATOR, DATA SAMPLING DEVICE, AND TEST DEVICE

摘要

a first variable delay element of multiple stages for successively delaying a data signal with a first delay amount; a second variable delay element of multiple stages for successively delaying a strobe signal with a second delay amount which is greater than the first delay amount; and a plurality of timing comparators for sampling data signals delayed by the first variable delay element of multiple stages by the strobe signal delayed by the second variable delay element of the same stage. Each of the timing comparators includes: a dynamic D-FF circuit for latching a data signal by a parasitic capacity according to the strobe signal and outputting it; a buffer for delaying the strobe signal; and a positive feedback D-FF circuit for latching the output signal from the dynamic D- FF circuit by a positive feed back circuit according to the delayed strobe signal and outputting it.