| 摘要 |
A two-transistor tri-state inverter is provided, made from a NMOS dual-gate thin-film transistor (DG-TFT) having a top gate, a back gate, and source/drain regions. A PMOS DG-TFT also has a top gate, a back gate, and S/D regions, and the NMOS first S/D region is connected to a PMOS first S/D region. The NMOS top gate is connected to an input signal (Vin), the back gate is connected to a control signal (Vb), the first S/D region supplies an output signal (Vout), and a second S/D region is connected to a reference voltage. The PMOS top gate is connected to the input signal, the back gate is connected to an inverted control signal (-Vb), and a second S/D region is connected to a supply voltage having a higher voltage than the reference voltage.
|
